IBM research alliance developed new process to build silicon nanosheet transistor, enabling creation of five nanometer chips

Briefing

IBM research alliance developed new process to build silicon nanosheet transistor, enabling creation of five nanometer chips

June 23, 2017

Briefing

  • Silicon Nanosheet Transistors – IBM, with research alliance partners GlobalFoundries and Samsung, developed new process for silicon nanosheet transistors enabling production of five nanometer (nm) chips
  • Supporting Technology – Uses Extreme Ultraviolet Litography (EUV) approach, same technology as seven nm chips, which allows continuous manipulation of nanosheet width, enabling power and performance optimization for specific circuits
  • Five Nanometer Chip Significance – Nanosheet-based five nm chip technology can deliver 40% better performance at fixed power, or 75 percent power savings at matched performance, compared to 10 nm technology available commercially
  • Potential Applications – Processors built using new technology expected by 2019, cutting expenses for manufacturing self driving-cars, enabling faster 5G network connectivity, allowing longer-lasting smartphone batteries, and accelerating development of next-generation IoT, artificial intelligence, and virtual reality devices and applications

Market Disruption

Business Model and Practices

Business Model
and Practices

Sector

Information Technology

Organization

GLOBALFOUNDRIES Inc., International Business Machines Corp., Samsung

Source

Original Publication Date

June 5, 2017

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